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Home
About Us
Why Semicon Service Nordic
Leadership Team
Services
Services to Employee
Services to Customer
Industry Practices
Design
Verification
Management
SOC Architects
Jobs
ASIC/FPGA Design
ASIC/FPGA Verification
Contact Us
LinkedIn
Must have EDA tool experience on Questasim or NCSIM and spyglass.
Must have the understanding of synthesis.
Must have used either System Verilog or Verilog or VHDL for design.
ASIC/FPGA workflow for knowledge of Design and has experience of at least 5 years.
Good Debugging skills.
